This application claims the benefit of Japanese Application No. 2001-73896 filed Mar. 15, 2001.
The present invention relates to a signal processing circuit and an ultrasound Doppler apparatus, and particularly to a signal processing circuit for processing a plurality of continuous wave (CW) signals, and an ultrasound Doppler apparatus for performing diagnosis by a CW Doppler method.
In performing ultrasonic diagnosis by a CW Doppler method, a Doppler shift of an echo of continuous wave ultrasound is calculated, and the calculated Doppler shift is displayed as a frequency spectral image or a sound. The frequency spectral image or sound is information representing the velocity of blood flow, etc.
When the direction of echo reception is electronically set by a phased array technique, a phased addition is performed on echoes received by a plurality of ultrasonic transducers in an ultrasonic probe.
The phased addition of the received echo signals is performed using an analog delay line. The analog delay line has a plurality of input taps provided at different positions in the longitudinal direction of the signal delay line, and an output tap provided at an end of the signal delay line. A signal input to one of the input taps is output from the output tap with a delay imparted depending upon the tap position. The maximum delay by the signal delay line is equal to one wavelength of the input signal.
By inputting a plurality of input signals to respective proper input taps depending upon the phase differences among the input signals, all the signals can be put in phase at the output tap. At the output tap, all the in-phase signals are superposed to provide a phased added signal of all the input signals.
To enable switching of the reception direction, the individual received echo signals are allowed to be input to arbitrarily selected input taps. As means for this, a matrix switch is employed. The matrix switch comprises a plurality of row signal lines and a plurality of column signal lines mutually insulated and disposed in a grid, and switches at the intersections of the row signal lines and column signal lines.
Since a row signal line and a column signal line are electrically connected at a closed switch, the switches can be selectively closed to connect arbitrarily selected row signal lines to arbitrarily selected column signal lines.
In such a matrix switch, arbitrarily selected received echo signals can be input to arbitrarily selected input taps of the analog delay line by inputting the plurality of received echo signals to either of the row signal lines or the column signal lines, connecting the other lines (i.e., column signal lines or row signal lines) to the input taps of the analog delay line and controlling opening/closing of the switches. In other words, the matrix switch serves as an arranger of the signal paths for inputting received echo signals to the analog delay line.
The number of switches in the matrix switch is the product of the number of received echo signals to be subjected to the phased addition and the number of the input taps of the analog delay line. The number of received echo signals is equal to the number of echo reception channels.
The number of echo reception channels has increased with miniaturization of the ultrasonic transducers, recently reaching the order of 48 channels, for example. The number of input taps of the analog delay line is of the order of 8 or 16. Hence, the matrix switch is required to have 384 or 768 switches, inevitably leading to scaling up.
It is therefore an object of the present invention to provide a signal processing circuit and an ultrasonic Doppler apparatus that can arrange continuous wave signal paths using fewer switches. Moreover, it is another object to provide a signal processing circuit and an ultrasonic Doppler apparatus that are adaptive to the frequency change of the continuous wave signals.
(1) The present invention, in accordance with one aspect thereof for solving the aforementioned problem, is a signal processing circuit comprising: a plurality of amplifying circuits for respectively amplifying a plurality of continuous wave input signals, and outputting each respective pair of amplified signals that have mutually opposite phases for each continuous wave input signal; a plurality of selecting circuits, each of which selects one signal of the pair of amplified signals from each of the plurality of amplifying circuits; and a matrix switch having a plurality of mutually crossing signal input paths and signal output paths, and switches provided one at every intersection of the signal input paths and signal output paths, in which the output signals from the plurality of selecting circuits are led respectively to the plurality of signal input paths.
In the invention as described in (1), since each of the plurality of amplifying circuits for respectively amplifying a plurality of continuous wave input signals outputs a pair of amplified signals that have mutually opposite phases for each input signal, a pair of amplified signals that are given a delay of substantially a half wavelength relative to each other can be obtained for each input signal.
Therefore, a delay circuit for performing a phased addition on a plurality of input signals may have a maximum delay of a half wavelength, and hence the number of input taps of the delay circuit is reduced by half. Accordingly, the number of switches in the matrix switch can be reduced by half.
In the invention as described in (1), the signal processing circuit preferably comprises voltage/current transforming circuits provided between the plurality of amplifying circuits and the plurality of selecting circuits, one voltage/current transforming circuit being provided for each of the output paths for each pair of amplified signals from the plurality of amplifying circuits, which is advantageous because the input signals for the selecting circuits can be current signals.
In the invention as described in (1), the signal processing circuit preferably comprises voltage/current transforming circuits provided between the plurality of selecting circuits and the matrix switch, one voltage/current transforming circuit being provided for each of the plurality of selecting circuits, which is advantageous because the input signals for the matrix switch can be current signals.
The voltage/current transforming circuit is preferably a resistor, which is advantageous because the configuration can be simplified.
In the invention as described in (1), the signal processing circuit preferably comprises a control circuit for controlling the selecting circuits and the switches in the matrix switch, which is advantageous because the connection relationship between the signal input paths and the signal output paths can be appropriately recombined.
In the invention as described in (1), the signal processing circuit preferably comprises a signal delay circuit having a plurality of signal input taps drawn out from different positions along a signal delay line and a signal output tap drawn out from at least one end of the signal delay line, in which the signals from the plurality of signal output paths of the matrix switch are led respectively to the plurality of signal input taps, which is advantageous because a phased addition can be suitably performed on a plurality of input signals.
The signal delay circuit preferably has at least two switchable delay characteristics, which is advantageous because the circuit can be adapted to the frequency change of the input signals.
The signal delay circuit preferably comprises matching resistors connected respectively to both ends of the signal delay line; a series circuit of a switch and a resistor connected in parallel to each of the matching resistors; and a series circuit of a capacitor and a switch provided between each end of the signal delay line and ground and between each of the drawn-out positions of the plurality of signal input taps and ground, which is advantageous because the circuit can be made adaptable to the frequency change of the input signals.
The signal processing circuit preferably comprises a control circuit for controlling the switches, which is advantageous because the circuit can be adapted to the frequency change of the input signals.
The signal processing circuit preferably comprises buffer amplifying circuits provided between the matrix switch and the signal delay circuit, one buffer amplifying circuit being provided for each of the plurality of signal output paths, which is advantageous because the signal output paths and the signal delay circuit can be prevented from being affected by each other""s internal impedance.
The buffer amplifying circuit is preferably a grounded-base type transistor circuit, which is advantageous because the configuration can be simplified.
(2) The present invention, in accordance with another aspect thereof for solving the aforementioned problem, is a signal processing circuit comprising: a signal delay line; matching resistors connected respectively to both ends of the signal delay line; a plurality of signal input taps drawn out from different positions along the signal delay line; a signal output tap drawn out from at least one end of the signal delay line; a series circuit of a switch and a resistor connected in parallel to each of the matching resistors; and a series circuit of a capacitor and a switch provided between each end of the signal delay line and ground and between each of the drawn-out positions of the plurality of signal input taps and ground.
In the invention as described in (2), since a series circuit of a switch and a resistor connected in parallel to each matching resistor, and a series circuit of a capacitor and a switch provided between each end of the signal delay line and ground and between each of the drawn-out positions of the plurality of signal input taps and ground are provided, the signal delay circuit can be adapted to a plurality of kinds of frequencies by opening/closing the switches.
In the invention as described in (2), the signal processing circuit preferably comprises a control circuit for controlling the switches, which is advantageous because the signal delay circuit can be adapted to a plurality of kinds of frequencies.
(3) The present invention, in accordance with still another aspect thereof for solving the aforementioned problem, is an ultrasound Doppler apparatus comprising: ultrasound transmitting/receiving means for transmitting continuous wave ultrasound and receiving echoes of the continuous wave ultrasound by a plurality of ultrasonic transducers; a plurality of amplifying means for respectively amplifying a plurality of continuous wave input signals led from the plurality of ultrasonic transducers, and outputting each respective pair of amplified signals that have mutually opposite phases for each continuous wave input signal; a plurality of selecting means, each of which selects one signal of the pair of amplified signals from each of the plurality of amplifying means; signal path arranging means having a plurality of mutually crossing signal input paths and signal output paths, and switches provided one at every intersection of the signal input paths and signal output paths, in which the output signals from the plurality of selecting means are led respectively to the plurality of signal input paths; signal delay means having a plurality of signal input taps drawn out from different positions along a signal delay line and a signal output tap drawn out from at least one end of the signal delay line, in which the signals from the plurality of signal output paths of the signal path arranging means are led respectively to the plurality of signal input taps; control means for controlling the selecting means and the switches in the signal path arranging means; Doppler processing means for calculating a Doppler shift of the echoes based on the signal led from the signal output tap of the signal delay means; and display means for displaying the calculated Doppler shift.
In the invention as described in (3), since each of the plurality of amplifying means for respectively amplifying a plurality of continuous wave input signals outputs a pair of amplified signals that have mutually opposite phases for each input signal, a pair of amplified signals that are given a delay of substantially a half wavelength relative to each other can be obtained for each input signal.
Therefore, delay means for performing a phased addition on a plurality of input signals may have a maximum delay of a half wavelength, and hence the number of input taps of the delay means is reduced by half. Accordingly, the number of switches in the signal path arranging means can be reduced by half.
In the invention as described in (3), the ultrasound Doppler apparatus preferably comprises voltage/current transforming means provided between the plurality of amplifying means and the plurality of selecting means, one voltage/current transforming means being provided for each of the output paths for each pair of amplified signals from the plurality of amplifying means, which is advantageous because the input signals for the selecting means can be current signals.
In the invention as described in (3), the ultrasound Doppler apparatus preferably comprises voltage/current transforming means provided between the plurality of selecting means and the signal path arranging means, one voltage/current transforming means being provided for each of the plurality of selecting means, which is advantageous because the input signals for the signal path arranging means can be current signals.
The voltage/current transforming means is preferably a resistor, which is advantageous because the configuration can be simplified.
In the invention as described in (3), the ultrasound Doppler apparatus preferably comprises buffer amplifying means provided between the signal path arranging means and the signal delay means, one buffer amplifying means being provided for each of the plurality of signal output paths, which is advantageous because the signal output paths and the signal delay means can be prevented from being affected by each other""s internal impedance.
The buffer amplifying means is preferably a grounded-base type transistor circuit, which is advantageous because the configuration can be simplified.
In the invention as described in (3), the signal path arranging means is preferably a matrix switch, which is advantageous because a general-purpose semiconductor integrated circuit can be used.
In the invention as described in (3), the signal delay means preferably has at least two switchable delay characteristics, which is advantageous because the apparatus can be adapted to the frequency change of the input signals.
The signal delay means preferably comprises matching resistors connected respectively to both ends of the signal delay line; a series circuit of a switch and a resistor connected in parallel to each of the matching resistors; a series circuit of a capacitor and a switch provided between each end of the signal delay line and ground and between each of the drawn-out positions of the plurality of signal input taps and ground; and control means for controlling the switches, which is advantageous because the apparatus can be adapted to the frequency change of the input signals.
As described above in detail, the present invention can provide a signal processing circuit and an ultrasonic Doppler apparatus that can arrange continuous wave signal paths using fewer switches. Moreover, the present invention can also provide a signal processing circuit and an ultrasonic Doppler apparatus that are adaptive to the frequency change of the continuous wave signals.
Further objects and advantages of the present invention will be apparent from the following description of the exemplary embodiments of the invention as illustrated in the accompanying drawings.